Si4322 Universal ISM Band
FSK Receiver
DESCRIPTION
Si4322
PIN ASSIGNMENT
Silicon Labs’s Si4322 is a single chip, low power, multi-channel FSK receiver
designed for use in applications requiring FCC or ETSI conformance for
unlicensed use in the 868 and 915 MHz bands. Used in conjunction with
SDI
SCK
nSEL
1
2
3
16
15
14
VDI
ARSSI
VDD
Silicon Labs’ FSK transmitters, the Si4322 is a flexible, low cost, and highly
integrated solution that does not require production alignments. All required
RF functions are integrated. Only an external crystal and bypass filtering is
needed for operation.
The Si4322 has a completely integrated PLL for easy RF design, and its
SDO / FFIT
nIRQ
DATA / nFFE
DCLK / nFFS / CFIL
CLK
4
5
6
7
8
IA4322
13
12
11
10
9
IN1
IN2
VSS
nRES
XTL / REF
rapid settling time allows for fast frequency hopping, bypassing multipath
fading, and interference to achieve robust wireless links. The PLL’s high
resolution allows the usage of multiple channels in any of the bands. The
baseband bandwidth (BW) is programmable to accommodate various
deviation, data rate, and crystal tolerance requirements. The receiver employs
the Zero-IF approach with I/Q demodulation, therefore no external
components (except crystal and decoupling) are needed in a typical
application. The Si4322 is a complete analog RF and baseband receiver
including a multi-band PLL synthesizer with an LNA, I/Q down converter
mixers, baseband filters and amplifiers, and I/Q demodulator.
This document refers to Si4322-IC Rev A0.
See www.silabs.com/integration for any applicable
errata. See back page for ordering information.
FEATURES
? Fully integrated (low BOM, easy design-in)
? No alignment required in production
? Fast settling, programmable, high-resolution PLL
The chip dramatically reduces the load on the microcontroller with integrated
digital data processing: data filtering, clock recovery, data pattern recognition
and integrated FIFO. The automatic frequency control (AFC) feature allows
using a low accuracy (low cost) crystal. To minimize the system cost, the chip
can provide a clock signal for the microcontroller, avoiding the need for two
crystals.
FUNCTIONAL BLOCK DIAGRAM
?
?
?
?
?
?
?
?
?
?
?
?
Fast frequency hopping capability
High bit rate (up to 115.2 kbps in digital mode and
256 kbps in analog mode)
Direct differential antenna input
Programmable baseband bandwidth
(134 to 400 kHz)
Analog and digital RSSI outputs
Automatic frequency control (AFC)
Data quality detection (DQD)
Internal data filtering and clock recovery
RX pattern recognition
SPI compatible serial control interface
Clock and reset signals for microcontroller
48 bit RX data FIFO
MIX
I
AMP
OC
7
DCLK
?
Standard 10 MHz crystal reference
IN1 13
IN2 12
LNA
MIX
Q
AMP
Self cal.
OC
I/Q
Demod.
Data Filt
CLK Rec
clk
data
6
DATA
?
?
?
Wake-up timer
Low battery detector
2.2 to 3.8 V supply voltage
FIFO
?
Low power consumption
RF Parts
PLL & I/Q VCO
with cal.
BB Amp/Filt./Limiter
RSSI
COMP
DQD
AFC
Data processing units
? Low standby current (typ. 0.3 μ A)
TYPICAL APPLICATIONS
?
Remote control
CLK div
Xosc
WTM
with cal.
LBD
Controller
Bias
?
Home security and alarm
Low Power parts
?
Wireless keyboard/mouse and other PC peripherals
8
CLK
9
XTL
15
ARSSI
1
SDI
2 3 4 5 16 10
SCK nSEL SDO nIRQ VDI nRES
11 14
VSS VDD
?
?
Toy control
Remote keyless entry
Si4322-DS rev 1.1r 0308
?
?
?
?
Tire pressure monitoring
Telemetry
Personal/patient data logging
Remote automatic meter reading
www.silabs.com
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